The miniaturization of technological structures is an ever-increasing trend across a wide range of fields including, but not limited to, electronics, biotechnology and electro-optics. In the art, the fabrication of miniaturized technological structures is commonly referred to as microfabrication when used to manufacture structures measured in microns (10−6 m) and nanofabrication when used to manufacture structures measured in nanometers (10−9 m) or smaller. As can be appreciated, it has been found that the resultant size of miniaturized structures is often limited by constraints associated with the particular fabrication process utilized to construct such structures.
The fabrication of miniature electrical devices, such as integrated circuits, is most commonly achieved using a multi-stepped, lithographic process in which patterned layers are sequentially formed onto a common substrate in a stacked relationship. Specifically, as part of the fabrication process, a uniform layer of resist is typically deposited onto the top surface of a flattened substrate. Thereafter, each miniaturized pattern is transferred into the layer of resist, for example, through exposure to light directed through a patterned mask (i.e. photolithography) or through direct mechanical deformation (i.e. imprint lithography).
In photolithography, the optically exposed areas are reacted and then the resist is developed by rinsing it in a bath. When positive photoresist is utilized, the reacted area becomes soluble and is rinsed away. When negative photoresist is utilized, the unexposed area is rinsed away. Effectively, a positive or negative template is created, which is left on the surface of the substrate, through the above-described exposure and development process. In a subsequent step, the entire surface is processed, for instance, by etching the surface, reacting the surface (e.g. as in doping to create a semiconductor), evaporating the surface, or depositing onto the surface, all in a patterned way through the photoresist template. Once the desired patterns are formed on the substrate, any remaining resist is then removed. In this manner, a plurality of miniature structures can be efficiently constructed onto a common substrate.
A semiconductor wafer (e.g. a silicon wafer) most commonly serves as the substrate on which miniature electrical devices are constructed using fabrication techniques of the type as described above. As can be appreciated, semiconductor wafers are relatively rigid and stable in nature and, as such, serve as a suitable construct on which to perform the various steps of the device manufacturing process.
However, it has becoming increasingly desirable in the art for miniature structures to be fabricated on thin, flexible substrates. The use of a thinner, more flexible substrate introduces a number of notable advantages over semiconductor wafers including, but not limited to, a significant reduction in the device size scale (e.g. in thickness), an expanded range of potential applications based on the flexible construction of the device, as well as enhanced manufacturing capabilities by incorporating the substrate as part of a continuous web, or roll.
Although desirable for the reasons set forth above, the use of thin, flexible substrates on which to fabricate miniature structures introduces a number of notable manufacturing challenges. In particular, it has been found that certain external factors, such as environmental conditions, can greatly affect geometric aspects of the substrate. For instance, a flexible substrate constructed out of polyethylene terephthalate (PET) (i) has a thermal coefficient of expansion which is approximately 30 times greater than silicon, (ii) has stiffness which is approximately 1/50th the stiffness of silicon, and (iii) could experience a change in volume as great as 0.5% upon exposure to moisture whereas, under similar conditions, silicon would not experience a change in volume.
As a result, a thin, flexible substrate is prone to stretch, contract, warp or otherwise deform in one or more dimensions in response to direct exposure to heat, moisture or tension. The creation of these types of variances in the structural form of the substrate can affect the level of precision by which each pattern is formed, largely due to issues in properly aligning the substrate throughout the various fabrication stages. This lack of precision introduced into the fabrication process can, in turn, significantly compromise the quality of the resultant product, especially as it relates to fabrication of nanometer-scale features and designs.
A low cost, well-known solution for deterministically producing very precise features in a miniature structure is to fabricate the structure through a process known in the art as block copolymer (BCP) self-assembly. BCP self-assembly allows for the fabrication of flexible structures in various shapes of micron to nanometer feature size by linking molecules together according to molecular weight and stress biases over a smooth or an embossed surface (e.g. through the application of a coating which is then evaporated or developed under heat or other actinide energy). The aforementioned process thereby enables the structure to undergo self-assembly in a manner that is self-consistent but not connected to any macro feature (i.e. not wired to the outside world). However, they may be aligned and oriented relative to an embossed surface on which they were developed or grown.
Although well-known in the art, the fabrication of miniature structures using block copolymer self-assembly often requires means for physically connecting the structure to a larger deterministic circuit in order to allow for the delivery of power and/or communication signals therebetween. As a result of this connection requirement, the entire fabrication process is rendered considerably more complex and may render the microfabrication useless unless some means to wire and align the self-assembled parts to the macro world is achieved.